Various processes in semiconductor device manufacturing involve depositing a layer of a first composition over a layer of a second composition. In some situations, the surface of the underlying film may comprise impurities that can affect the adhesion of the two layers, as well as other mechanical and/or electrical properties of a semiconductor device. For example, in an example Damascene process flow, a metal is deposited onto a patterned dielectric layer to fill vias and trenches formed in the dielectric layer. Then, excess metal is removed via chemical mechanical polishing (CMP), thereby forming a planar surface comprising regions of exposed copper and low-k dielectric onto which other layers, such as a silicon carbide etch stop layer, are deposited.
Exposed copper regions may be subject to oxidation prior to the formation of subsequent layers. Similarly, hydrocarbon residues may remain on a wafer surface after a CMP process. The presence of copper oxide may cause problems with the adhesion of an etch stop film on the exposed copper portions of the wafer. Therefore, various cleaning processes may be used to remove such copper. In one specific example, such a wafer may be exposed to a direct plasma in a plasma-enhanced chemical vapor deposition (PECVD) processing chamber for a period of time prior to introducing chemical vapors to the processing chamber. The use of a reducing plasma, such as an ammonia or hydrogen plasma, may reduce copper oxide and hydrocarbons on the surface, thereby cleaning the surface. However, depending upon processing conditions, such direct plasmas also may affect a low-k dielectric surrounding the copper. Further, the use of an in-situ plasma cleaning process step in a PECVD chamber may reduce overall PECVD system throughput.